Parent Log: http://ci.aztec-labs.com/a2cd928a8ad9a44d Command: 6b749196b5c0246c:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/b608f9359219731d3c03407689a4fadaaa5a0d45 Env: REF_NAME=gh-readonly-queue/next/pr-15006-082468f0c1e7e5424b3654b5be0f3560eed7e487 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Thu Jun 12 13:43:28 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15006_amd64_x1-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 13:43:28 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 13:43:28 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 13:43:28 [==========] Running 1 test from 1 test suite. 13:43:28 [----------] Global test environment set-up. 13:43:28 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 13:43:28 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 13:43:28 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 13:43:28 created first inner circuit (mem: 56.59 MiB) 13:43:28 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.59 MiB) 13:43:28 created second inner circuit (mem: 56.59 MiB) 13:43:28 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.59 MiB) 13:43:30 created first outer circuit (mem: 574.98 MiB) 13:43:30 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 574.98 MiB) 13:43:32 created second outer circuit (mem: 1053.98 MiB) 13:43:40 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2566.68 MiB) 13:44:04 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2759.09 MiB) 13:44:29 created third outer circuit (mem: 2974.04 MiB) 13:44:29 number of gates in layer 3 circuit = 1469951 (mem: 2974.04 MiB) 13:44:32 prover gates = 2097152 (mem: 4289.16 MiB) 13:44:33 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5455.44 MiB) 13:45:24 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (115970 ms) 13:45:24 [----------] 1 test from AcirHonkRecursionConstraint/1 (115970 ms total) 13:45:24 13:45:24 [----------] Global test environment tear-down 13:45:24 [==========] 1 test from 1 test suite ran. (115970 ms total) 13:45:24 [ PASSED ] 1 test.