Parent Log: http://ci.aztec-labs.com/058821c2fea0ded6 Command: 060f2775b5406036:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/4e03f15ca8099f25d50eddd19c4914764b84fe7b Env: REF_NAME=gh-readonly-queue/next/pr-15013-4800d08570523bc1b2a9e8ec0dfb09e326f4689a CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 14:30:02 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15013_amd64_x2-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 14:30:02 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 14:30:02 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 14:30:02 [==========] Running 1 test from 1 test suite. 14:30:02 [----------] Global test environment set-up. 14:30:02 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 14:30:02 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 14:30:02 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 14:30:02 created first inner circuit (mem: 56.63 MiB) 14:30:02 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.63 MiB) 14:30:02 created second inner circuit (mem: 56.63 MiB) 14:30:02 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.63 MiB) 14:30:05 created first outer circuit (mem: 574.46 MiB) 14:30:05 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 574.46 MiB) 14:30:07 created second outer circuit (mem: 1051.46 MiB) 14:30:16 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2549.57 MiB) 14:30:42 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2732.29 MiB) 14:31:09 created third outer circuit (mem: 2979.43 MiB) 14:31:09 number of gates in layer 3 circuit = 1469951 (mem: 2979.43 MiB) 14:31:13 prover gates = 2097152 (mem: 4280.06 MiB) 14:31:14 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5444.43 MiB) 14:32:04 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (121267 ms) 14:32:04 [----------] 1 test from AcirHonkRecursionConstraint/1 (121267 ms total) 14:32:04 14:32:04 [----------] Global test environment tear-down 14:32:04 [==========] 1 test from 1 test suite ran. (121267 ms total) 14:32:04 [ PASSED ] 1 test.