Parent Log: http://ci.aztec-labs.com/38d1899c9cb6c2c4 Command: 5da9bf0e22f2387d:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/0.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/517501b8b3c82d562e946c782c8fe75426951f62 Env: REF_NAME=gh-readonly-queue/next/pr-15016-a8c553f203c98e5ca274e763c8e51daaaaf760d6 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 09:48:08 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15016_amd64_x3-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_0e4b4c9c338e4ee0_next 09:48:08 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 09:48:08 Note: Google Test filter = AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 09:48:08 [==========] Running 1 test from 1 test suite. 09:48:08 [----------] Global test environment set-up. 09:48:08 [----------] 1 test from AcirHonkRecursionConstraint/0, where TypeParam = bb::UltraRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 09:48:08 [ RUN ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 09:48:08 created first inner circuit (mem: 14.00 MiB) 09:48:08 created second inner circuit (mem: 15.00 MiB) 09:48:08 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 29.00 MiB) 09:48:10 created first outer circuit (mem: 554.42 MiB) 09:48:10 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 554.42 MiB) 09:48:13 created second outer circuit (mem: 1058.42 MiB) 09:48:20 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2571.48 MiB) 09:48:45 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2748.93 MiB) 09:49:07 created third outer circuit (mem: 2966.67 MiB) 09:49:07 number of gates in layer 3 circuit = 1411875 (mem: 2966.67 MiB) 09:49:10 prover gates = 2097152 (mem: 4247.16 MiB) 09:49:11 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5416.06 MiB) 09:50:01 [ OK ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition (112875 ms) 09:50:01 [----------] 1 test from AcirHonkRecursionConstraint/0 (112876 ms total) 09:50:01 09:50:01 [----------] Global test environment tear-down 09:50:01 [==========] 1 test from 1 test suite ran. (112876 ms total) 09:50:01 [ PASSED ] 1 test.