Parent Log: http://ci.aztec-labs.com/4bd36cecb2b5c7bf Command: 060f2775b5406036:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/0.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/d3bba2d69dbc070d51bcd50607354193573876ba Env: REF_NAME=gh-readonly-queue/next/pr-14877-314d7622c6bacc8333ae49fe9583967cab78349b CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 12:50:45 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14877_amd64_x3-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_0e4b4c9c338e4ee0_next 12:50:45 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 12:50:45 Note: Google Test filter = AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 12:50:45 [==========] Running 1 test from 1 test suite. 12:50:45 [----------] Global test environment set-up. 12:50:45 [----------] 1 test from AcirHonkRecursionConstraint/0, where TypeParam = bb::UltraRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 12:50:45 [ RUN ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 12:50:45 created first inner circuit (mem: 14.00 MiB) 12:50:45 created second inner circuit (mem: 15.00 MiB) 12:50:45 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 29.00 MiB) 12:50:47 created first outer circuit (mem: 556.06 MiB) 12:50:48 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 556.06 MiB) 12:50:50 created second outer circuit (mem: 1045.06 MiB) 12:50:59 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2554.90 MiB) 12:51:27 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2744.06 MiB) 12:51:54 created third outer circuit (mem: 2961.58 MiB) 12:51:54 number of gates in layer 3 circuit = 1411875 (mem: 2961.58 MiB) 12:51:57 prover gates = 2097152 (mem: 4246.27 MiB) 12:51:58 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5416.36 MiB) 12:52:46 [ OK ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition (120587 ms) 12:52:46 [----------] 1 test from AcirHonkRecursionConstraint/0 (120587 ms total) 12:52:46 12:52:46 [----------] Global test environment tear-down 12:52:46 [==========] 1 test from 1 test suite ran. (120587 ms total) 12:52:46 [ PASSED ] 1 test.