Parent Log: http://ci.aztec-labs.com/f378932cfb9e1a30 Command: ddee941f13db6e98:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/0.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/e56baa7f24bac54baf9e2f22f6f33ae6fa8b8c0f Env: REF_NAME=gh-readonly-queue/next/pr-14891-76ca48a2187e3506bb464eae574e49476c2876ca CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 19:16:31 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14891_amd64_x2-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_0e4b4c9c338e4ee0_next 19:16:31 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 19:16:31 Note: Google Test filter = AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 19:16:31 [==========] Running 1 test from 1 test suite. 19:16:31 [----------] Global test environment set-up. 19:16:31 [----------] 1 test from AcirHonkRecursionConstraint/0, where TypeParam = bb::UltraRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 19:16:31 [ RUN ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 19:16:31 created first inner circuit (mem: 14.00 MiB) 19:16:31 created second inner circuit (mem: 15.00 MiB) 19:16:31 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 30.00 MiB) 19:16:34 created first outer circuit (mem: 556.14 MiB) 19:16:34 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 556.14 MiB) 19:16:36 created second outer circuit (mem: 1056.14 MiB) 19:16:46 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2550.79 MiB) 19:17:17 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2728.18 MiB) 19:17:43 created third outer circuit (mem: 2957.21 MiB) 19:17:43 number of gates in layer 3 circuit = 1411875 (mem: 2957.21 MiB) 19:17:45 prover gates = 2097152 (mem: 4223.46 MiB) 19:17:46 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5392.28 MiB) 19:18:38 [ OK ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition (126841 ms) 19:18:38 [----------] 1 test from AcirHonkRecursionConstraint/0 (126841 ms total) 19:18:38 19:18:38 [----------] Global test environment tear-down 19:18:38 [==========] 1 test from 1 test suite ran. (126841 ms total) 19:18:38 [ PASSED ] 1 test.