Parent Log: http://ci.aztec-labs.com/fb060ce60853fc2e Command: b65330ebb7ef0b78:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/0.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/2731d9a8aebf63d05db1a786296abdf897c49490 Env: REF_NAME=gh-readonly-queue/next/pr-14988-420e0a54fb4bfe8b04d7dd479f59ed0fe3ad3b74 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Thu Jun 12 17:01:29 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14988_amd64_x3-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_0e4b4c9c338e4ee0_next 17:01:29 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 17:01:29 Note: Google Test filter = AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 17:01:29 [==========] Running 1 test from 1 test suite. 17:01:29 [----------] Global test environment set-up. 17:01:29 [----------] 1 test from AcirHonkRecursionConstraint/0, where TypeParam = bb::UltraRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 17:01:29 [ RUN ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 17:01:29 created first inner circuit (mem: 14.00 MiB) 17:01:29 created second inner circuit (mem: 15.00 MiB) 17:01:29 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 30.00 MiB) 17:01:32 created first outer circuit (mem: 554.80 MiB) 17:01:32 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 554.80 MiB) 17:01:34 created second outer circuit (mem: 1052.80 MiB) 17:01:41 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2531.54 MiB) 17:02:07 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2712.74 MiB) 17:02:31 created third outer circuit (mem: 2957.47 MiB) 17:02:31 number of gates in layer 3 circuit = 1411875 (mem: 2957.47 MiB) 17:02:34 prover gates = 2097152 (mem: 4231.85 MiB) 17:02:35 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5400.80 MiB) 17:03:25 [ OK ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition (115738 ms) 17:03:25 [----------] 1 test from AcirHonkRecursionConstraint/0 (115738 ms total) 17:03:25 17:03:25 [----------] Global test environment tear-down 17:03:25 [==========] 1 test from 1 test suite ran. (115738 ms total) 17:03:25 [ PASSED ] 1 test.