Parent Log: http://ci.aztec-labs.com/0a3dcc35f70cf6da Command: ddee941f13db6e98:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit Commit: https://github.com/AztecProtocol/aztec-packages/commit/9d6fb0bd1594726370a5f3a56591963452264642 Env: REF_NAME=gh-readonly-queue/next/pr-14985-47c749527b1c3cce3edd9defedc46e89ea00c69e CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 17:20:21 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14985_amd64_x3-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_f870a96bf6d65d3a_next 17:20:22 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 17:20:22 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit 17:20:22 [==========] Running 1 test from 1 test suite. 17:20:22 [----------] Global test environment set-up. 17:20:22 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 17:20:22 [ RUN ] AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit 17:20:22 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 17:20:22 created first inner circuit (mem: 56.08 MiB) 17:20:22 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.08 MiB) 17:20:22 created second inner circuit (mem: 56.08 MiB) 17:20:22 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.08 MiB) 17:20:24 created first outer circuit (mem: 567.09 MiB) 17:20:24 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 567.09 MiB) 17:20:32 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2235.75 MiB) 17:21:03 created second outer circuit (mem: 2382.89 MiB) 17:21:03 number of gates in layer 3 = 1470039 (mem: 2382.89 MiB) 17:21:06 prover gates = 2097152 (mem: 3746.25 MiB) 17:21:07 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 4911.81 MiB) 17:22:08 [ OK ] AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit (106198 ms) 17:22:08 [----------] 1 test from AcirHonkRecursionConstraint/1 (106198 ms total) 17:22:08 17:22:08 [----------] Global test environment tear-down 17:22:08 [==========] 1 test from 1 test suite ran. (106198 ms total) 17:22:08 [ PASSED ] 1 test.