Parent Log: http://ci.aztec-labs.com/d9cbe39da05505e1 Command: 049e4025f7cee894:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/c0e766a133071c44b2c0d8fac5df352c6e059df1 Env: REF_NAME=gh-readonly-queue/next/pr-15015-cf8be0f9e81e248048560619de041e90d9d6990a CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 07:50:55 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15015_amd64_x1-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 07:50:55 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 07:50:55 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 07:50:55 [==========] Running 1 test from 1 test suite. 07:50:55 [----------] Global test environment set-up. 07:50:55 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 07:50:55 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 07:50:55 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 07:50:55 created first inner circuit (mem: 56.08 MiB) 07:50:55 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.08 MiB) 07:50:55 created second inner circuit (mem: 56.08 MiB) 07:50:55 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.08 MiB) 07:50:57 created first outer circuit (mem: 569.29 MiB) 07:50:57 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 569.29 MiB) 07:50:59 created second outer circuit (mem: 1054.29 MiB) 07:51:07 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2550.20 MiB) 07:51:33 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2737.22 MiB) 07:51:58 created third outer circuit (mem: 2972.48 MiB) 07:51:58 number of gates in layer 3 circuit = 1469951 (mem: 2972.48 MiB) 07:52:01 prover gates = 2097152 (mem: 4280.74 MiB) 07:52:02 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5444.63 MiB) 07:52:52 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (117103 ms) 07:52:52 [----------] 1 test from AcirHonkRecursionConstraint/1 (117103 ms total) 07:52:52 07:52:52 [----------] Global test environment tear-down 07:52:52 [==========] 1 test from 1 test suite ran. (117103 ms total) 07:52:52 [ PASSED ] 1 test.