Parent Log: http://ci.aztec-labs.com/308e04cfcea07bcf Command: 049e4025f7cee894:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit Commit: https://github.com/AztecProtocol/aztec-packages/commit/30660269b33bab8cca354c41659533acf4d48e07 Env: REF_NAME=gh-readonly-queue/next/pr-15026-d96baf1c44329e8b2e3a432ad803f702f5184a62 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 09:30:36 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15026_amd64_x1-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_f870a96bf6d65d3a_next 09:30:36 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 09:30:36 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit 09:30:36 [==========] Running 1 test from 1 test suite. 09:30:36 [----------] Global test environment set-up. 09:30:36 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 09:30:36 [ RUN ] AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit 09:30:36 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 09:30:36 created first inner circuit (mem: 56.64 MiB) 09:30:36 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.64 MiB) 09:30:36 created second inner circuit (mem: 56.64 MiB) 09:30:36 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.64 MiB) 09:30:38 created first outer circuit (mem: 578.08 MiB) 09:30:38 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 578.08 MiB) 09:30:45 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2232.46 MiB) 09:31:09 created second outer circuit (mem: 2382.26 MiB) 09:31:09 number of gates in layer 3 = 1470039 (mem: 2382.26 MiB) 09:31:13 prover gates = 2097152 (mem: 3768.47 MiB) 09:31:14 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 4931.73 MiB) 09:32:06 [ OK ] AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit (90596 ms) 09:32:06 [----------] 1 test from AcirHonkRecursionConstraint/1 (90596 ms total) 09:32:06 09:32:06 [----------] Global test environment tear-down 09:32:06 [==========] 1 test from 1 test suite ran. (90597 ms total) 09:32:06 [ PASSED ] 1 test.