Parent Log: http://ci.aztec-labs.com/f69a1713c602d5eb Command: ddee941f13db6e98:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit Commit: https://github.com/AztecProtocol/aztec-packages/commit/47c749527b1c3cce3edd9defedc46e89ea00c69e Env: REF_NAME=gh-readonly-queue/next/pr-15009-00cd67e98e76d3202a0219baf301d59ef4211872 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 15:49:49 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15009_amd64_x4-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_f870a96bf6d65d3a_next 15:49:49 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 15:49:49 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit 15:49:49 [==========] Running 1 test from 1 test suite. 15:49:49 [----------] Global test environment set-up. 15:49:49 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 15:49:49 [ RUN ] AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit 15:49:49 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 15:49:49 created first inner circuit (mem: 56.57 MiB) 15:49:49 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.57 MiB) 15:49:49 created second inner circuit (mem: 56.57 MiB) 15:49:49 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.57 MiB) 15:49:52 created first outer circuit (mem: 568.38 MiB) 15:49:52 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 568.38 MiB) 15:49:59 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2247.55 MiB) 15:50:26 created second outer circuit (mem: 2390.02 MiB) 15:50:26 number of gates in layer 3 = 1470039 (mem: 2390.02 MiB) 15:50:30 prover gates = 2097152 (mem: 3761.36 MiB) 15:50:31 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 4921.66 MiB) 15:51:26 [ OK ] AcirHonkRecursionConstraint/1.TestOneOuterRecursiveCircuit (96973 ms) 15:51:26 [----------] 1 test from AcirHonkRecursionConstraint/1 (96973 ms total) 15:51:26 15:51:26 [----------] Global test environment tear-down 15:51:26 [==========] 1 test from 1 test suite ran. (96973 ms total) 15:51:26 [ PASSED ] 1 test.