Parent Log: http://ci.aztec-labs.com/4bd36cecb2b5c7bf Command: 060f2775b5406036:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/d3bba2d69dbc070d51bcd50607354193573876ba Env: REF_NAME=gh-readonly-queue/next/pr-14877-314d7622c6bacc8333ae49fe9583967cab78349b CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 12:50:45 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14877_amd64_x3-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 12:50:45 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 12:50:45 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 12:50:45 [==========] Running 1 test from 1 test suite. 12:50:45 [----------] Global test environment set-up. 12:50:45 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 12:50:45 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 12:50:45 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 12:50:45 created first inner circuit (mem: 56.56 MiB) 12:50:45 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.56 MiB) 12:50:45 created second inner circuit (mem: 56.56 MiB) 12:50:45 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.56 MiB) 12:50:47 created first outer circuit (mem: 576.62 MiB) 12:50:48 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 576.62 MiB) 12:50:50 created second outer circuit (mem: 1049.62 MiB) 12:50:58 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2547.05 MiB) 12:51:24 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2735.45 MiB) 12:51:49 created third outer circuit (mem: 2968.20 MiB) 12:51:49 number of gates in layer 3 circuit = 1469951 (mem: 2968.20 MiB) 12:51:52 prover gates = 2097152 (mem: 4276.09 MiB) 12:51:53 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5441.22 MiB) 12:52:43 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (117774 ms) 12:52:43 [----------] 1 test from AcirHonkRecursionConstraint/1 (117774 ms total) 12:52:43 12:52:43 [----------] Global test environment tear-down 12:52:43 [==========] 1 test from 1 test suite ran. (117774 ms total) 12:52:43 [ PASSED ] 1 test.