Parent Log: http://ci.aztec-labs.com/b76b4dcd886228d5 Command: 060f2775b5406036:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/00cd67e98e76d3202a0219baf301d59ef4211872 Env: REF_NAME=gh-readonly-queue/next/pr-15040-7339c264ad706420ee9babb0dd1b6ed793e97402 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 15:16:22 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15040_amd64_x2-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 15:16:23 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 15:16:23 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 15:16:23 [==========] Running 1 test from 1 test suite. 15:16:23 [----------] Global test environment set-up. 15:16:23 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 15:16:23 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 15:16:23 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 15:16:23 created first inner circuit (mem: 56.09 MiB) 15:16:23 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.09 MiB) 15:16:23 created second inner circuit (mem: 56.09 MiB) 15:16:23 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.09 MiB) 15:16:25 created first outer circuit (mem: 570.89 MiB) 15:16:25 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 570.89 MiB) 15:16:28 created second outer circuit (mem: 1047.89 MiB) 15:16:36 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2566.18 MiB) 15:17:02 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2755.84 MiB) 15:17:27 created third outer circuit (mem: 2965.33 MiB) 15:17:27 number of gates in layer 3 circuit = 1469951 (mem: 2965.33 MiB) 15:17:29 prover gates = 2097152 (mem: 4271.54 MiB) 15:17:30 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5435.19 MiB) 15:18:22 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (119453 ms) 15:18:22 [----------] 1 test from AcirHonkRecursionConstraint/1 (119453 ms total) 15:18:22 15:18:22 [----------] Global test environment tear-down 15:18:22 [==========] 1 test from 1 test suite ran. (119453 ms total) 15:18:22 [ PASSED ] 1 test.