Parent Log: http://ci.aztec-labs.com/ec53a48cfa0deda9 Command: 049e4025f7cee894:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/26c5a39fe03723d11540f721293d7aebd1f478d9 Env: REF_NAME=gh-readonly-queue/next/pr-14995-75d792847d8434a0c504e7adf5c102a913065272 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 08:56:14 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14995_amd64_x4-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 08:56:14 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 08:56:14 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 08:56:14 [==========] Running 1 test from 1 test suite. 08:56:14 [----------] Global test environment set-up. 08:56:14 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 08:56:14 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 08:56:14 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 08:56:14 created first inner circuit (mem: 57.58 MiB) 08:56:14 Proving with UltraRollupHonk but no IPA claims exist. (mem: 57.58 MiB) 08:56:14 created second inner circuit (mem: 57.58 MiB) 08:56:14 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 57.58 MiB) 08:56:17 created first outer circuit (mem: 574.61 MiB) 08:56:17 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 574.61 MiB) 08:56:19 created second outer circuit (mem: 1056.61 MiB) 08:56:28 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2549.11 MiB) 08:56:55 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2726.07 MiB) 08:57:22 created third outer circuit (mem: 2969.49 MiB) 08:57:22 number of gates in layer 3 circuit = 1469951 (mem: 2969.49 MiB) 08:57:25 prover gates = 2097152 (mem: 4278.15 MiB) 08:57:26 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5442.17 MiB) 08:58:16 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (121372 ms) 08:58:16 [----------] 1 test from AcirHonkRecursionConstraint/1 (121372 ms total) 08:58:16 08:58:16 [----------] Global test environment tear-down 08:58:16 [==========] 1 test from 1 test suite ran. (121372 ms total) 08:58:16 [ PASSED ] 1 test.