Parent Log: http://ci.aztec-labs.com/5285bbb6426f906e Command: 3f957be15a604130:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/1.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/15c121440ebf929fded7bd0c31960fb154a3fa7a Env: REF_NAME=gh-readonly-queue/next/pr-14554-befc8c4c9ab253911288e1ef4bdd56c5ae8eeb9b CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Wed Jun 11 22:54:24 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-14554_amd64_x2-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_bafe85c33b4ce4ee_next 22:54:24 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 22:54:24 Note: Google Test filter = AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 22:54:24 [==========] Running 1 test from 1 test suite. 22:54:24 [----------] Global test environment set-up. 22:54:24 [----------] 1 test from AcirHonkRecursionConstraint/1, where TypeParam = bb::UltraRollupRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 22:54:24 [ RUN ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition 22:54:24 Proving with UltraRollupHonk but no IPA claims exist. (mem: 12.00 MiB) 22:54:24 created first inner circuit (mem: 56.57 MiB) 22:54:24 Proving with UltraRollupHonk but no IPA claims exist. (mem: 56.57 MiB) 22:54:24 created second inner circuit (mem: 56.57 MiB) 22:54:24 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 56.57 MiB) 22:54:26 created first outer circuit (mem: 561.58 MiB) 22:54:26 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 561.58 MiB) 22:54:29 created second outer circuit (mem: 1044.58 MiB) 22:54:36 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2525.96 MiB) 22:55:03 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2713.29 MiB) 22:55:30 created third outer circuit (mem: 2947.79 MiB) 22:55:30 number of gates in layer 3 circuit = 1469951 (mem: 2947.79 MiB) 22:55:33 prover gates = 2097152 (mem: 4264.99 MiB) 22:55:34 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5429.65 MiB) 22:56:23 [ OK ] AcirHonkRecursionConstraint/1.TestFullRecursiveComposition (118540 ms) 22:56:23 [----------] 1 test from AcirHonkRecursionConstraint/1 (118540 ms total) 22:56:23 22:56:23 [----------] Global test environment tear-down 22:56:23 [==========] 1 test from 1 test suite ran. (118540 ms total) 22:56:23 [ PASSED ] 1 test.