Parent Log: http://ci.aztec-labs.com/51b65f4b246e4eda Command: ddee941f13db6e98:CPUS=4:MEM=8g barretenberg/cpp/scripts/run_test.sh dsl_tests AcirHonkRecursionConstraint/0.TestFullRecursiveComposition Commit: https://github.com/AztecProtocol/aztec-packages/commit/76ca48a2187e3506bb464eae574e49476c2876ca Env: REF_NAME=gh-readonly-queue/next/pr-15045-9d6fb0bd1594726370a5f3a56591963452264642 CURRENT_VERSION=0.87.6 CI_FULL=1 Date: Fri Jun 13 18:00:46 UTC 2025 System: ARCH=amd64 CPUS=128 MEM=493Gi HOSTNAME=pr-15045_amd64_x1-full Resources: CPU_LIST=0-127 CPUS=4 MEM=8g TIMEOUT=600s History: http://ci.aztec-labs.com/list/history_0e4b4c9c338e4ee0_next 18:00:46 Running main() from /home/aztec-dev/aztec-packages/barretenberg/cpp/build/_deps/gtest-src/googletest/src/gtest_main.cc 18:00:46 Note: Google Test filter = AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 18:00:46 [==========] Running 1 test from 1 test suite. 18:00:46 [----------] Global test environment set-up. 18:00:46 [----------] 1 test from AcirHonkRecursionConstraint/0, where TypeParam = bb::UltraRecursiveFlavor_<bb::UltraCircuitBuilder_<bb::UltraExecutionTraceBlocks> > 18:00:46 [ RUN ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition 18:00:46 created first inner circuit (mem: 14.00 MiB) 18:00:46 created second inner circuit (mem: 15.00 MiB) 18:00:46 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 29.00 MiB) 18:00:49 created first outer circuit (mem: 549.72 MiB) 18:00:49 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 549.72 MiB) 18:00:51 created second outer circuit (mem: 1043.72 MiB) 18:01:00 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2543.73 MiB) 18:01:25 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 2728.52 MiB) 18:01:50 created third outer circuit (mem: 2932.93 MiB) 18:01:50 number of gates in layer 3 circuit = 1411875 (mem: 2932.93 MiB) 18:01:54 prover gates = 2097152 (mem: 4221.22 MiB) 18:01:55 WARNING: We are temporarily regressing prover speed by computing the verification key in the prover. This will be fixed in a followup PR. (mem: 5392.16 MiB) 18:02:46 [ OK ] AcirHonkRecursionConstraint/0.TestFullRecursiveComposition (119256 ms) 18:02:46 [----------] 1 test from AcirHonkRecursionConstraint/0 (119256 ms total) 18:02:46 18:02:46 [----------] Global test environment tear-down 18:02:46 [==========] 1 test from 1 test suite ran. (119257 ms total) 18:02:46 [ PASSED ] 1 test.